High Performance Embedded Systems

High Performance Embedded Systems (HPES)




Scientific description

The computing area has been recently deeply modified by the emergence of the so-called multicore processor. Within the same chip, several computing units are implemented. This architectural concept allows meeting the performance requirements under stringent energy consumption constraints. Multicores are used for laptops, Graphical Processor Units (GPU), High Performance Computing (HPC) platforms, but also for embedded systems su ch as mobile phones. Moreover, low-power high performance multicores developed for embedded systems will be soon used in data centers for HPC. This raises new scientific challenges to architecture, systems and application designers that have face massively parallel computing platforms.

The number of cores on a chip is increasing quickly. At the same time, the memory bandwidth is increasing too slowly to ensure the performance such multicore platforms should attain. This phenomenon is known as “Memory Wall” and at the moment no efficient solution to exceed this limitation exists. With the increase in the number of
cores, cache coherency is becoming as well a tremendous challenge.

Power consumption is also a huge challenge as it imposes strong constraints on the computing platform, whatever the application domain. The first machine ranked in the Green500 has an energy performance ratio of 2 Gflops per watt. This ratio has to be improved by 30 when exascale computing is considered. The multi-core processor might help to improve this ratio; however, the software stack should as well evolve to boost this improvement.

Organized internal Seminars

Evènements "Journées de la compilation"


Team members

  • H-P. Charles (CEA-LIST)
  • L. Fesquet (TIMA)
  • S. Lesecq (CEA-LETI)
  • S. Mancini (TIMA)
  • N. Marchand (Gipsa)
  • J-F. Méhaut (LIG)
  • F. Rastello (INRIA)
  • E. Rutten (INRIA)
  • L. Vincent (Post-Doc)
  • Naweiluo Zhou (PhD student)