Heterogenous Architectures: Versatile Exploitation and programing

Project Description

Computer architectures are getting more and more complex, exposing massive parallelism, hierarchically-organized memories and heterogeneous processing units. Such architectures are extremely difficult to program as they most of the time make application programmers choose between portability and performance.

While standard programming environments like OpenMP are currently evolving to support the execution of applications on different kinds of processing units, such approaches suffer from two main issues. First, to exploit heterogeneous processing units from the application level, programmers need to explicitly deal with hardware-specific low-level mechanisms, such as the memory transfers between the host memory and private memories of a co-processor for example. Second, as the evolution of programming environments towards heterogeneous programming mainly focuses on CPU/GPU platforms, some hardware accelerators are still difficult to exploit from a general-purpose parallel application.

FPGA is one of them. Unlike CPUs and GPUs, this hardware accelerator can be configured to fit the application needs. It contains arrays of programmable logic blocks that can be wired together to build a circuit specialized for the targeted application. For example, FPGAs can be configured to accelerate portions of code that are known to perform badly on CPUs or GPUs. The energy efficiency of FPGAs is also one of the main assets of this kind of accelerators compared to GPUs, which encourages the scientific community to consider FPGAs as one of the building blocks of large scale low-power heterogeneous multicore platforms.

However, only a fraction of the community considers programming FPGAs for now, as configurations must be designed using low-level description languages such as VHDL that application programmers are not experienced with.

The main objective of this project is to improve the accessibility of heterogeneous architectures containing FPGA accelerators to parallel application programmers. The proposed project focuses on three main aspects:

  • Portability: we don’t want application programmers to redesign their applications completely to benefit from FPGA devices. This means extending standard parallel programming environments like OpenMP to support FPGA. Improving application portability also means leveraging most of the hardware-specific low-level mechanisms at the runtime system level ;

  • Performance: we want our solution to be flexible enough to get the most out of any heterogeneous platforms containing FPGA devices depending on specific performance needs, like computation throughput or energy consumption for example ;

  • Experiments: Experimenting with FPGA accelerators on real-life scientific applications is also a key element of our project proposal. In particular, the solutions developed in this project will allow comparisons between architectures on real-life applications from different domains like signal processing and computational finance.

​Efficient programming and exploitation of heterogeneous architectures implies the development of methods and tools for system design, embedded or not. The HEAVEN project proposal fits in the PCS research action of the PERSYVAL-lab. 


  • [07/10/18] Best paper award at the ReCoSoC 2018 conference for the paper "An FPGA target for the StarPU heterogeneous runtime system", Georgios Christodoulis, Manuel Selva, François Broquedis, Olivier Muller et Frederic Desprez
  • [07/03/18] Georgios Christodoulis presented HEAVEN at LIG day.
  • [06/05/18] Rostyslav Brylov joined the HEAVEN project as a Master intern. During 3 month, he will work under the supervision of Olivier Muller on porting the Rhodinia HPC Benchmark on the HEAVEN plateform.
  • [03/24/18] Best paper award at the ATSIP 2018 conference for the paper "Efficient parallelization of GMM background subtraction algorithm on a multi-core platform for moving objects detection", Lhoussein Mabrouk, Sylvain Huet, Dominique Houzet, Said Belkouch, Abdelkrim Hamzaoui et Yahya Zennayi
  • [02/01/18] Manuel Selva joined the HEAVEN project as a postdoc researcher.
  • [07/01/17] Lhoussein Mabrouk joined the HEAVEN project as PhD student, partially funded by the project. He will work under the advisement of Sylvain Huet on porting signal processing computing kernels to heterogeneous platforms.
  • [11/03/16] Olivier Muller presented the HEAVEN project at the LIP seminar in Lyon
  • [10/13/16] Sébastien Pairault defended his Master thesis entitled : "Build and Evaluate a CPU/GPU/FPGA heterogeneous platform for embedded computer vision applications"
  • [10/12/16] Olivier Muller gave a talk at the FPGA workshop in UIUC (Urbana Champaign) with strong links to the HEAVEN project
  • [06/29/16] Georgios Christodoulis presented the HEAVEN project at the JLESC workshop in Lyon
  • [03/01/16] Sébastien Pairault joined the HEAVEN project as a Master intern. He will work under the advisement of Sylvain Huet and Ernesto Gomez-Balderas on porting signal processing computing kernels to heterogeneous platforms embedding FPGA devices.
  • [11/24/15] HEAVEN kick-off meeting hosted at TIMA
  • [10/01/15] Georgios Christodoulis started a PhD in the HEAVEN project. Frédéric Desprez also joins the project as Georgios' advisor. Georgios will be co-advised by Frédéric Desprez, Olivier Muller and François Broquedis.

Project leaders :

  • Olivier Muller, associate professor at the Grenoble Institute of Technology, TIMA lab
  • François Broquedis, associate professor at the Grenoble Institute of Technology, LIG lab

Project members :